Anwendbarkeit abstrakter Simulationsmodelle auf unterschiedlich komplexe Prozessorarchitekturen

Description

Simulations are an adequate measure for the development of software and for the prediction of the runtime that is to be expected. For this purpose, there are many different kinds of techniques. However, it has not been checked yet, if these approaches are suitable for different kinds of processor architectures with regard to the predicted runtime and the reachable simulation speed. A simple processor with a short instruction pipeline might be predicted more easily than a complex processor architecture that supports out-of-order execution. This dissertation investigates this fact by examining three selected simulation approaches of different abstraction levels. They exhibit a reduced prediction error with an increased modeling effort, but also get slower with it. For this, an approach based on instruction latencies, one based on an instruction-driven architecture model, and one based on a cycle-driven architecture model are chosen. They are used to predict three processor architectures that differ in complexity and the measured accuracy is compared to the reached simulation speed. For teaching the simulatorshow to simulate the reference processors, algorithmic configuration is used and briefly evaluated. Finally, by applying especially introduced metrics, it could be determined that the speed advantage of the fastest but most inaccurate simulation approach is higher than the slightly increased error of the prediction of each processor in comparison to the other simulation approaches. For this reason, the usage of instruction weights for predicting the runtime can be suggested as the result of this investigation.